[LLVMdev] Reducing .td redundancy

[David Greene]

Is it legal to do something like a !strconcat on a non-string entity?  That 
is, is there some operation that will let me do this (replace SOME_CONCAT with 
an appropriate operator):

(WARNING!  Hacked-up tablegen ahead!)

multiclass sse_fp_binop_bitwise_rm<bits<8> opc, string OpcodeStr,
                                    SDNode OpNode> {
  // Vector operation emulating scalar (fp)
  def FsPSrr : PSI<opc, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:
$src2),
                      !strconcat(OpcodeStr, "ps"\t{$src2, $dst|$dst, $src2}"),
                      [(set FR32:$dst, (!SOME_CONCAT("x86f", OpNode) FR32:
$src1, FR32:$src2))]>;

  // Vector operation
  def PSrr : PSI<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:
$src2),
                      !strconcat(OpcodeStr, "ps"\t{$src2, $dst|$dst, $src2}"),
                      [(set VR128:$dst, v2i64 (OpNode VR128:$src1, VR128:
$src2))]>;

  // Bitconverted vector operation
  def PSrm : PSI<opc, MRMSrcMem,
                    (outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
                    !strconcat(OpcodeStr, "ps\t{$src2, $dst|$dst, $src2}"),
                    [(set VR128:$dst, (OpNode (bc_v2i64 (v4f32 VR128:$src1)),
                                       (memopv2i64 addr:$src2)))]>;
// ...
}

defm AND : ...
defm OR : ...

I suspect we could get rid of a lot of redundancy if SOME_CONCAT could really 
work.  I've run into a few places where I think something like this could be 
used.

                                             -Dave