[LLVMdev] Proposal to disable some of DAG combine optimizations

[Alireza.Moshtaghi at microchip.com]

Some of the optimizations that the first DAG combine performs is counter
productive for our 8-bit target. For example in:

// I dropped the types because they are irrelevant. 
// Excuse me for changing the syntax...
store %tmp1, %var
%tmp2 = load %var
%tmp4 = add %tmp3, %tmp2

Since load is the only user of var and since var has just be stored to,
it assumes that %tmp1 is alive and it goes ahead and removes the load
and does:

store %tmp1, var
tmp4 = add %tmp3 , %tmp1

This is great for architectures that have more than one registers
because it is likely that value of %tmp1 is already in a physical
register, hence saving an instruction. However for our 8-bit
architecture with only one register, this kind of assumptions will just
result in extra overhead because "add" operates only on memory, so we
have to generate more instructions to store tmp1 to memory and then use
that memory location for "add". But without the optimizations, we could
just use var and everything would work out just fine.

So I propose to add a bit mask and a method to TargetLowering class so
targets can individually select some of the optimizations to be turned
off.

Thoughts?  

Alireza Moshtaghi
Senior Software Engineer
Development Systems, Microchip Technology