[LLVMdev] Load with null memory operand?

Villmow, Micah Micah.Villmow at amd.com
Mon Mar 9 08:20:37 PDT 2009


Evan,

 The problem I'm having is what exactly is the meaning of a load
instruction with a NULL memory location would even mean in the sense of
tablegen/llvm or how it is even possible to be generated. I am currently
viewing this as equivalent to a load from a NULL pointer and that
definitely should not be generated anywhere. Once I understood this then
I can probably figure out how to pattern match it correctly. 

 

Thanks,

Micah

 

________________________________

From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
On Behalf Of Evan Cheng
Sent: Sunday, March 08, 2009 6:44 PM
To: LLVM Developers Mailing List
Subject: Re: [LLVMdev] Load with null memory operand?

 

It depends on how your target models its addressing mode. Targets with
complex addressing modes usually isel addresses with custom code.

 

Evan

 

On Mar 6, 2009, at 4:05 PM, Villmow, Micah wrote:





How do I match against this instruction?

01ABDA58: i64,ch = load 01ABD948, 01ABD8C0, 01AB1350 <null:0>

 

 

This is the first time I've seen NULL in the memory operand location.
Any idea on how this could be mapped with tablegen correctly?

 

Thanks,

Micah Villmow

Systems Engineer

Advanced Technology & Performance

Advanced Micro Devices Inc.

S1-609 One AMD Place

Sunnyvale, CA. 94085

P: 408-749-3966

 

 

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