[LLVMdev] help with tablegen

[Nick Lewycky]

In order to make metadata useful to the backend, I'd like to permit 
intrinsics to be written that take metadata-typed objects. To allow 
this, I decided to try adding a new machine value type right next to isVoid.

I updated both ValueTypes.td and ValueTypes.h as well as 
TableGen/IntrinsicEmitter.cpp and TableGen/CodeGenTarget.cpp where they 
have switch(mvt). The actual patch is attached.

This runs into trouble with the X86 backend where the SSE2 forms of ADD 
are defined:

llvm[3]: Building X86.td DAG instruction selector implementation with tblgen
ADDPDrm:        (set:isVoid VR128:isFP:$dst, (fadd:isFP 
VR128:isFP:$src1, (ld:isFP 
addr:iPTR:$src2)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_memop>>))
/home/nicholas/llvm-commit/Debug/bin/tblgen: error:
Included from X86.td:128:
Included from X86InstrInfo.td:3964:
Parsing X86InstrSSE.td:1320: In ADDPDrm: Could not infer all types in 
pattern!
defm ADD : basic_sse2_fp_binop_rm<0x58, "add", fadd, 
int_x86_sse2_add_sd, 1>;
      ^

I'm hoping someone with backend experience understands why this would 
happen. I've looked over the definition of basic_sse2_fp_binop_rm and 
can't see any way in which adding MVT::isMetadata should impact it or 
the type inference step.

I'm stumped. Does anyone have any suggestions?

Nick
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