[LLVMdev] Vector logic regression in r73431

[Nicolas Capens]

Hi All,

 

I found a regression which triggers the asserts: "Binary operator types must
match!" and "Op types should be identical!". It's happening with a piece of
vector code, and the asserts happen because a logic operation is attempted
between a vector and a scalar (which is not present in the original code,
but created by InstCombine).

 

It's caused by revision 73431. I was able to fix it by changing the
following (identical) lines in InstCombiner::visitAnd, visitOr and visitXor:

 

  if (SimplifyDemandedInstructionBits(I))

    return &I;

 

Into:

 

  if (!isa<VectorType>(I.getType()) && SimplifyDemandedInstructionBits(I))

    return &I;

 

Apparently SimplifyDemandedInstructionBits doesn't work correctly with
vector operands, sometimes replacing them with a scalar value?

 

So could anyone who knows the ins and outs of this code have a look at how
to make it handle vectors correctly? Or if that's not an option right now,
please revert the broken optimizations. Note that there might be more things
affected than visitAnd, visitOr and vistXor, I've only been able to identify
these so far with little knowledge of the actual code. I currently don't
have a reduced testcase, but if really necessary I can try to extract one.

 

Cheers,

 

Nicolas

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