[LLVMdev] Case where VSETCC DAGCombiner hack doesn't work

[Duncan Sands]

Hi Chris,

> When legalize types sees the sext from <4 x i1> -> <4 x i32>, its only  
> solution right now is to scalarize the whole mess feeding into it,  
> giving us really atrocious code.
> 
> IMO, the solution to this is to have a legalize-types action for  
> vectors that corresponds to "promote" on scalars.  In this case, since  
> X86 supports VSETCC, the 4 x i1 SETCC should "vector promote" to a  
> VSETCC node with a 4xi32 result, the and should vector promote to  
> 4xi32, and the sext should vector promote as a vector sext_inreg.
> 
> I don't think that implementing this is particularly hard, but I have  
> plenty of other things I'm working on right now.  Is anyone else  
> interested in working on this?

I agree that this should be straightforward: if the vector element
type is illegal (eg: i1), then legalize the element while keeping
it a vector (eg: <4 x i1> -> <4 x i8> or whatever, <4 x i128> ->
<8 x i64>).  One question is whether type legalization should
handle the element type in the same way it would if it was a scalar,
eg should <4 x i1> get turned into <4 x i8>, since an i1 gets turned
into an i8, or into something else like <4 x i32>?  I guess the first
option would be slightly simpler/more regular from the type legalization
viewpoint.  Operation legalization could later turn <4 x i8> into
<4 x i32> if that's better for the operation.  That said, I don't plan
to work on this.

Ciao,

Duncan.