[LLVMdev] HazardRecognizer and RegisterAllocation

[Dan Gohman]

On Jan 19, 2009, at 3:38 PM, David Greene wrote:

> On Monday 19 January 2009 16:42, Dan Gohman wrote:
>
>>>> Perhaps you want to do this after register allocation is done.  
>>>> Dan is
>>>> developing the post-allocation scheduler. You can try it out.
>>>
>>> Interesting. Can it already be found SVN? I will search the mail
>>> archive
>>> later, if not.
>>
>> Yes, it is in SVN. It's new, and so far it's only being used in  
>> limited
>> ways, and not anything like your specific problem. We don't currently
>> have any targets in-tree that require no-ops, so it may not address  
>> all
>> your needs out of the box, but patches are welcome :-).
>
> Dan, how does the scheduler handle memory dependence?  I'm working on
> something that requires memory dependence information for
> MachineInstructions.


At the moment, it knows simple things, like constant pool loads
don't have dependencies, and references to distinct stack slots are
independent, and so on.

I have a few ideas for how more precise memory dependencies might be
achieved.

We have MachineMemOperands, which can be used to make AliasAnalysis
or other LLVM-IR-level analysis queries. They need some work though;
the main issue is that there are some places in codegen that don't
preserve them.

Another possibility is to record dependence information from the
SelectionDAG in MachineInstrs somehow. We don't yet have precise
memory dependencies in the SelectionDAG, but it would be good to
fix that too :-). This would probably also involve AliasAnalysis
queries from codegen, possibly going though the
MemoryDependenceAnalysis interface.

Dan