[LLVMdev] Use two ComplexPatterns (possible bug of TableGen?)

[Alex]

It seems that it's not allowed to two same 'ComplexPattern's  in a 'def',
because TableGen generate the same variable names for the two ComplexPatterns.
If I understand the source code of TableGen correctly, it's not designed to
use more than one ComplexPattern instance (no matter they are the same or not).

In the following example, two 'regsw' are used to match the operands of mul.

def regsw : Operand<v4i32>,
            ComplexPattern<v4i32, 2, "SelectRegsw", []> {
  let PrintMethod = "printSrcReg";
  let MIOperandInfo = (ops VR128, i8imm);
}

def MUL_1 : FooInst<(outs VR128:$dst),
                    (ins regsw:$src0, regsw:$src1),
                    "mul $dst, $src0, $src1",
                    [(set VR128:$dst, (mul regsw:$src0, regsw:$src1))]>;


The code generate by TableGen is:

SDNode *Select_ISD_MUL_v4i32(const SDValue &N) {
  SDValue N0 = N.getOperand(0);
  SDValue CPTmp0;
  SDValue CPTmp1;
  if (SelectRegsw(N, N0, CPTmp0, CPTmp1)) {
    SDValue N1 = N.getOperand(1);
    SDValue CPTmp0;
    SDValue CPTmp1;
    if (SelectRegsw(N, N1, CPTmp0, CPTmp1)) {
      return Emit_1(N, FooVS::MUL_1, MVT::v4i32, CPTmp0, CPTmp1);
    }
  }