[LLVMdev] Vector swizzling and write masks code generation

[Alex]

Chris Lattner wrote:
> > So I think my options come down to:
> >
> > 1) figure out a way of having code generator be actually able to combine
> all
> > those IR instructions back into
> > OP dst.writemask src1.swizzle1 src2.swizzle2
> 
> Yep.  If you're using the LLVM code generator, it makes it reasonably easy 
> to pattern match on this sort of thing and/or introduce machine specific 
> abstractions to describe them.

I'd like to know if this is already implemented in some backend? so that I
can take it as an example.
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