[LLVMdev] Modeling GPU vector registers, again (with my implementation)

[Scott Michel]

On Feb 16, 2009, at 9:24 AM, Villmow, Micah wrote:
>   In order to get swizzling to work you only need to handle three
> SDNodes, insert_vector_elt, extract_vector_elt and build_vector while
> expanding the rest. For those three nodes I then custom lowered  
> them to
> a target specific node with an extra integer constant per register  
> that
> would encode the swizzle mask in 32bits.

Villimow, Micah:

This problem argues for why SDNode should be target polymorphic. If  
they were target polymorphic, then a target-specific node would be  
largely unnecessary. (By a target-specific node, I mean extending the  
ISD enumeration for your target.) A target polymorphic SDNode would  
still capture all of the behaviors and attributes with  
insert_vector_elt, extract_vector_elt and build_vector, but also  
allow you to add additional behaviors and attributes. Which is mostly  
the point in object oriented programming. Assuming you don't need to  
do extra DAGCombine work, you would get that for free from the parent  
class.

Unfortunately, that would mean a lot of work at this juncture and a  
heavy overhaul of SelectionDAGNodes.h and associated SelectionDAG  
source. Node allocation, in particular, would become more complicated  
(but not unsolvable.)

Were anyone going to tackle this problem, the solution would have to  
be largely incremental, i.e., the source can't be overhauled all at  
once, but should permit incremental transition of SDNodes to a  
behavioral interface style.


-scooter