[LLVMdev] Target Intrinsics via Tablegen
Villmow, Micah
Micah.Villmow at amd.com
Thu Aug 13 18:23:08 PDT 2009
I noticed with my most recent sync that there is new tablegen
instructions to generate target intrinsic information. Are there any
examples of a backend using target specific intrinsic without having to
modify llvm core to add support for them?
Thanks,
Micah
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