[LLVMdev] disabling combining load/stores in optimizer.

[Eli Friedman]

On Mon, Aug 3, 2009 at 3:09 PM, Dan Gohman<gohman at apple.com> wrote:
>
> On Aug 3, 2009, at 1:20 PM, Alireza.Moshtaghi at microchip.com wrote:
>>>
>>>> I feel that such optimizations may not result in any gain for PIC16
>>>>
>>>> as PIC16 does everything on i8.
>>>>
>>>
>>>
>>> The legalize pass should turn an i64 store into 8 i8 stores
>>>
>>> then, which is essentially the same as what an {i32,i32} store
>>>
>>> would turn into. Is there a problem with this?
>>>
>>>
>>>
>>
>> We are currently doing this, however I think disabling such
>> optimizations is a much better solution.
>
> An LLVM design goal is that backends should be able to outsmart
> instcombine when necessary, rather than having instcombine be able
> to disable parts of itself in order to avoid foiling the backends.
> Practicality sometimes steers elsewhere of course. Please explain
> why you think suppressing this particular optimization is better;
> it isn't obvious how it would look different in the end.

Perhaps the transformation in question is actually memcpy->scalar
load+store?  For a target where the scalar takes more than a couple
registers, if the backend can't disambiguate the pointers, it's
essentially forced to copy src->stack temporary->dest.  For an 64-bit
memcpy on a target with 8-bit registers, I imagine the result is quite
ugly.

-Eli