[LLVMdev] What is the state of LLVM's ARM backend

[Xerxes Rånby]

Hello Evan and Robert
I have been investigating the unexpected test failures from the ARM 
nightly builders in order to get a better picture why the ARM backend 
don't pass the whole testsuite: I have run the failing tests manually on 
my arm board and can now categorize most of the thirteen unexpected 
CodeGen failures in four categories:

1. llvm don't lower MVT::i64 properly on arm errors
http://labb.zafena.se/shark-testing/llvmARMCodeGenFailures200904/i64armLoweringRelatedErrors/
example:

root at overo:/home/xerxes/llvm-test/fail/CodeGen/notnativelysupported# llvm-as < 2008-02-04-ExtractSubvector.ll  | llc
llc: /usr/src/openembedded/overo/tmp/work/armv7a-angstrom-linux-gnueabi/llvm2.6-2.6-r0/llvm-2.6/include/llvm/Target/TargetLowering.h:158: llvm::TargetRegisterClass* llvm::TargetLowering::getRegClassFor(llvm::MVT) const: Assertion `RC && "This value type is not natively supported!"' failed.
Stack dump:
0.	Program arguments: llc 
1.	Running pass 'ARM Instruction Selection' on function '@main'
Aborted


2. lowering sometimes produces unexpected results error
http://labb.zafena.se/shark-testing/llvmARMCodeGenFailures200904/loweringproducesunexpectedresults/
example:

root at overo:/home/xerxes/llvm-test/fail/CodeGen/loweringproducesunexpected# llvm-as < multiple-return-values-cross-block-with-invoke.ll | llc 
llc: /usr/src/openembedded/overo/tmp/work/armv7a-angstrom-linux-gnueabi/llvm2.6-2.6-r0/llvm-2.6/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1579: llvm::SDValue<unnamed>::SelectionDAGLegalize::LegalizeOp(llvm::SDValue): Assertion `(Tmp3.getNode()->getNumValues() == Result.getNode()->getNumValues() || (Tmp3.getNode()->getNumValues() == Result.getNode()->getNumValues() + 1 && Tmp3.getNode()->getValueType(Tmp3.getNode()->getNumValues() - 1) == MVT::Flag)) && "Lowering call/formal_arguments produced unexpected # results!"' failed.
Stack dump:
0.	Program arguments: llc 
1.	Running pass 'ARM Instruction Selection' on function '@foo'
Aborted


3. Could not match memory address errors
http://labb.zafena.se/shark-testing/llvmARMCodeGenFailures200904/matchmemoryaddress_inlineasmfailure/
example:

root at overo:/home/xerxes/llvm-test/fail/CodeGen/matchmemoryaddress# llvm-as < 2007-04-08-MultipleFrameIndices.ll | llc
Could not match memory address.  Inline asm failure!
	.file	"<stdin>"
Aborted


4. softfloat related errors
http://labb.zafena.se/shark-testing/llvmARMCodeGenFailures200904/softenfloat_Do_not_know_how_to_soften_the_result_of_this_operator/
example:

root at overo:/home/xerxes/llvm-test/fail/CodeGen/softenfloat# llvm-as < 2007-11-19-VectorSplitting.ll  | llc
SoftenFloatResult #0: 0x614e00: f32 = undef 
llc: /usr/src/openembedded/overo/tmp/work/armv7a-angstrom-linux-gnueabi/llvm2.6-2.6-r0/llvm-2.6/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp:54: void llvm::DAGTypeLegalizer::SoftenFloatResult(llvm::SDNode*, unsigned int): Assertion `0 && "Do not know how to soften the result of this operator!"' failed.
Stack dump:
0.	Program arguments: llc 
1.	Running pass 'ARM Instruction Selection' on function '@execute_shader'
Aborted


All of these errors can ofcourse be experienced on other architectures 
as well when generating .S files for arm using
llc -march=arm

There was some tests failing for the ExecutionEngine yet i am uncertain 
if it is a error since i it fails on X86 as well like this one:
http://labb.zafena.se/shark-testing/llvmExecutionEngine200904/segfault/
example:

root at overo:/home/xerxes/llvm-test/fail/ExecutionEngine200904/segfault# llvm-as < 2003-05-07-ArgumentTest.ll | lli - test
Tried to execute an unknown external function: i32 (i8*)* puts
Stack dump:
0.	Program arguments: lli - test 
Aborted


The unexpected tests that i have been investigation where those produced 
by the cfarm-arm nightly tester on 090321.
I have uploaded a pdf of the testresult for future reference:
http://labb.zafena.se/shark-testing/llvmTestLogs/arm090321.pdf

Cheers and have a great day!
Xerxes


Evan Cheng skrev:
> LLVM ARM v6 backend is in fairly good shape. Even the JIT passes  
> nearly the entire llvm test suite. There are some known missing bits:
>
> 1. Exception handling
> 2. Atomic
>
> Not sure:
> 3. Debugging support (should be trivial to hook up if it's not done)
>
> Also the thumb backend is not awesome. Its performance is not great.
>
> Evan
>
> On Apr 1, 2009, at 6:34 AM, Robert Schuster wrote:
>
>   
>> Hi,
>> the ARM backend lacks some stuff like support for atomic intrinsics. I
>> learned the hard way (crash). Lately I was told that the ARM backend  
>> of
>> LLVM is generally in its early stages of development.
>>
>> I would like to know more about this. Which stuff is missing, known to
>> be unstable and the like.
>>
>> Thanks in advance for taking the time.
>>
>> Regards
>> Robert
>>
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