[LLVMdev] Generalizing shuffle vector

[Mon Ping Wang]

Hi,

The current definition of shuffle vector is
      <result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <n x  
i32> <mask>    ; yields <n x <ty>>

The first two operands of a 'shufflevector' instruction are vectors  
with types that match each other and types that match the result of  
the instruction. The third argument is a shuffle mask, which has the  
same number of elements as the other vector type, but whose element  
type is always 'i32'. The shuffle mask operand is required to be a  
constant vector with either constant integer or undef values.

I am proposing to extend the shuffle vector definition to be
   <result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x  
i32> <mask>    ; yields <m x <ty>>

The third argument is the shuffle mask and it is not required to have  
the same number of elements as the other vector type but the element  
type is still always 'i32'

The reason for this change is to allow us to handle vectors much more  
naturally,  allows the generated IR to reflect the structure of the  
user code, and most importantly do a better job in code generation.   
Today, building a vector for different lengths requires a sequence of  
extracting each element in the vector and inserting each element into  
a new vector.  With this new form, it is more straightforward to write  
and reason about

typedef __attribute__(( ext_vector_type(4) )) float float4;
typedef __attribute__(( ext_vector_type(8) )) float float8;
float8 f8;
float4 f4a, f4b, f4c;
f4a = f8.hi;
f8.hi = f4b; f8.lo = f4c;

where hi and lo represent the high half and low half of the vector.   
The outgoing IR is
   %f4a = shufflevector <8xf32>%f8, undef, <4xi32> <0, 1, 2, 3>
   %f8 = shufflevector <4xf32>%f4b, <4xf32>%f4c, <8xi32> <0, 1, 2, 3,  
4, 5, 6, 7>

The problem with generating insert and extracts is that we can  
generate poor code
        %tmp16 = extractelement <4 x float> %f4b, i32 0
        %f8a = insertelement <8 x float> %f8a, float %tmp16, i32 0
        %tmp18 = extractelement <4 x float> %f4b, i32 1
        %f8c = insertelement <8 x float> %f8b, float %tmp18, i32 1
       ...
For X86, legalize will convert each insertelement to become a vector  
shuffle.  We are very careful in combining vector shuffles because we  
don't want to produce a vector shuffle whose mask is illegal or hard  
to code gen so we end up in this code to generate a sequence of unpcks  
and movhlps for this.  With the new form, Legalize will divide the  
8xf32 vector into two 4xf32 and since the two sides are the same, it  
will generate quad word moves to copy the values.

There are other cases when a user write vector code, the generation of  
extract element and insert elements will cause us to lose the  
structure of the original vector code and without this structure, the  
code generator will not generate code for it.

Please let me know if you have any comments, suggestions, or concerns,

Thanks,
   -- Mon Ping



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