[LLVMdev] confused about llvm.memory.barrier

[Duncan Sands]

Consider the following example (A and B are global
variables that initially contain 0):

Processor 1:
  store 1, A
  x = load B

Processor 2:
  store 1, B
  y = load A

Is it possible to end up with x = 0 and y = 0?
Yes!  This is exactly the example in table 2.3.a
of http://www.intel.com/products/processor/manuals/318147.pdf.
Yet it seems impossible to use gcc memory barriers
to prevent this, since they compile to nothing on x86...

Ciao,

Duncan.