[LLVMdev] adde/addc

[Richard Pennington]

Richard Osborne wrote:
[snip]
> ExpandADDSUB(SDNode *N, SelectionDAG &DAG)
> {
> assert(N->getValueType(0) == MVT::i64 &&
> (N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::SUB) &&
> "Unknown operand to lower!");
> 
> // Extract components
> SDOperand LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, 
> N->getOperand(0),
> DAG.getConstant(0, MVT::i32));
> SDOperand LHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, 
> N->getOperand(0),
> DAG.getConstant(1, MVT::i32));
> SDOperand RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, 
> N->getOperand(1),
> DAG.getConstant(0, MVT::i32));
> SDOperand RHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, 
> N->getOperand(1),
> DAG.getConstant(1, MVT::i32));
> 
> // Expand
> SDOperand Lo = DAG.getNode(N->getOpcode(), MVT::i32, LHSL, RHSL);
> 
> ISD::CondCode CarryCC = (N->getOpcode() == ISD::ADD) ? ISD::SETULT : 
> ISD::SETUGT;
> SDOperand Carry = DAG.getSetCC(MVT::i32, Lo, LHSL, CarryCC);
> 
> SDOperand Hi = DAG.getNode(N->getOpcode(), MVT::i32, LHSH, Carry);
> Hi = DAG.getNode(N->getOpcode(), MVT::i32, Hi, RHSH);
> // Merge the pieces
> return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, Lo, Hi).Val;
> }
> 

Thanks for the help!

For me (with current LLVM) it became:

SDValue Nios2TargetLowering::
ExpandADDSUB(SDValue Op, SelectionDAG &DAG)
{
   assert(Op.getValueType() == MVT::i64 &&
          (Op.getOpcode() == ISD::ADD || Op.getOpcode() == ISD::SUB) &&
          "Unknown operand to lower!");

   // Extract components
   SDValue LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32,
                              Op.getOperand(0),
                              DAG.getConstant(0, MVT::i32));
   SDValue LHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32,
                              Op.getOperand(0),
                              DAG.getConstant(1, MVT::i32));
   SDValue RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32,
                              Op.getOperand(1),
                              DAG.getConstant(0, MVT::i32));
   SDValue RHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32,
                              Op.getOperand(1),
                              DAG.getConstant(1, MVT::i32));

   // Expand
   SDValue Lo = DAG.getNode(Op.getOpcode(), MVT::i32, LHSL, RHSL);

   ISD::CondCode CarryCC = (Op.getOpcode() == ISD::ADD) ? ISD::SETULT :
                           ISD::SETUGT;
   SDValue Carry = DAG.getSetCC(MVT::i32, Lo, LHSL, CarryCC);

   SDValue Hi = DAG.getNode(Op.getOpcode(), MVT::i32, LHSH, Carry);
   Hi = DAG.getNode(Op.getOpcode(), MVT::i32, Hi, RHSH);
   // Merge the pieces
   return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, Lo, Hi);
}

-Rich