[LLVMdev] adde/addc

Richard Pennington rich at pennware.com
Mon Sep 8 04:20:56 PDT 2008


Richard Pennington wrote:
> My target doesn't support 64 bit arithmetic, so I'd like to supply 
> definitions for adde/addc. The problem is I can't seem to figure out the 
> magic. Here's an example of what I need to generate:
> 
> # two i64s in r5/r6 and r7/r8
> # result in r1/r2, carry in r3
> 
> # adde
>     add r2, r6, r8
>     cmpltu r3, r2, r6	# compute carry
> 
> # addc
>      add r1, r5, r7
>      add r1, zero, r3

Oops! I meant:

     add r1, r1, r3

> 
> Is this possible given the current code generation stuff? Is there 
> another approach that I should consider?
> 
> -Rich
> 
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> 




More information about the llvm-dev mailing list