[LLVMdev] INSERT_SUBREG node.

[sanjiv gupta]

On Thu, 2008-10-16 at 08:55 -0700, Evan Cheng wrote:
> On Oct 15, 2008, at 11:21 AM, sanjiv gupta wrote:
> 
> >>>
> >>
> >> Ok. The AX / AH super-reg and sub-reg relationship is not defined. In
> >> general x86 is not making good use of the high 8-bit sub-registers.  
> >> We
> >> are leaving some performance on the table. We'll probably fix it one
> >> day. However, this doesn't apply to your target, right?  There is
> >> nothing preventing you from specifying the sub-registers and making
> >> use of insert_subreg, no?
> >>
> >> Evan
> >>
> > it is, though we have a workaround.
> >
> > We have 16-bit registers class and want to set both the lo and high
> > parts using INSERT_SUBREG.
> >
> > The workaround is to declare the same SubRegClass twice while  
> > declaring
> > the SuperRegisterClass. i.e.
> >
> > def FSR16: RegisterClass <"PIC16", [i16], 8, [FSR0, FSR1]> {
> >  let SubRegClassList = [FSR8, FSR8];   // HERE.
> > }
> 
> This is a bug, probably in tablegen. Unfortunately I don't have the  
> time to fix it. But please file a bug about this. Hopefully someone  
> will fix it soon.
> 
> Thanks,
> 
> Evan
> 

PR2916 filed.
Though I did not quite understand why this could be a tablegen bug?

- Sanjiv