[LLVMdev] Forcing basic blocks to end with no more than one branch instruction?

[Dale Johannesen]

On Oct 15, 2008, at 11:38 AMPDT, Daniel M Gessel wrote:

> I'm analyzing the basic blocks of MachineInstructions that LLVM
> generates for my TargetMachine to try to reconstruct high-level flow
> control.
>
> I misunderstood the isTerminator property of an instruction to mean
> that it had to be at the end of a basic block, but now I've seen
> blocks that end with a conditional branch followed by an unconditional
> branch.
>
> I'm sure this depends somewhat on my target, but can there be an
> arbitrary number of conditional branches before that last branch? How
> about before a return?

Right now, the interface assumes that a block ending with a branch
has at most two successors (see AnalyzeBranch for example).
There are also switch tables, which can handle some cases of what you  
want.

> Before I dive in and generalize my analysis (probably only a minor
> pain), is there any way I can get LLVM to generate BBs that are
> constrained to use only one terminator instruction?

Not now, and it would be a fairly pervasive change.