[LLVMdev] INSERT_SUBREG node.

[Evan Cheng]

On Oct 2, 2008, at 11:02 AM, Sanjiv.Gupta at microchip.com wrote:

> What’s the value produced by an INSERT_SUBREG node? Is it a chain?

No, insert_subreg returns a value:

v1 = insert_subreg v2, v3, idx

v1 and v2 will have the same type, e.g. i16, and v3 must have a sub- 
register type, e.g. i8.

> Can I use to set a superreg of i16 type with two i8 values, and use  
> the supperreg as an operand somewhere else?

Suppose you want to use a pair of i8 v1, v2 to create a i16 v3. The  
way to do it is:

v4 = insert_subreg implicit_def, v1, 0
v3 = insert_subreg v4,                 v2, 1

Evan

>
> - Sanjiv
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081002/950b4d9e/attachment.html>