[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?

[Duncan Sands]

Hi,

> I am not sure how legalizer and friends deal with i24 / f24 as legal  
> types.

the type legalizer currently assumes that all legal integer types
have a power-of-two number of bits.  I don't see any obstacles to
making it more general though.  First off, i24 would need to be
added to the list of simple value types.  Then the integer promotion
and expansion logic would need to be taught things like this:
i16 promotes to i24, i32 promotes to i48 which is then expanded to
2 x i24.  Finally, all of the code would need to be audited to see
if it assumes that types promoted to / expanded to (or from) are
powers of two in length.  Most of it probably doesn't assume any
such thing, fortunately.

Once types are legal, there's still the problem of making sure
everything else works fine with i24.  One obvious problem is
that (a bit like x86 long double) it isn't naturally aligned.
Presumably if you store two i24's then the second is stored
4 bytes after the first?  Dunno how many places in the code
generator make assumptions about this kind of thing.

Ciao,

Duncan.