[LLVMdev] 32 bit boolean results

[Eli Friedman]

On Tue, Nov 18, 2008 at 1:56 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote:
> The IR produces correct results, but my backend does not and the only thing
> I can think of is that the IR is treating the Booleans as i1 and therefore
> either and'ing or xor'ing the results of my comparison with the value 1.

CodeGen assumes that SETCC(true condition) & 1 == 1, and SETCC(false
condition) & 1 == 0.  For details, look in SelectionDAGNodes.h.  If
your comparisons are returning something unusual, you may have to
custom-lower them.

> I have no clue how the 1 gets put in there

(!(idx > 0)) == (idx <= 0) == (idx <  1).  Most likely the DAGCombiner
is doing this.

What should be happening is something like the following:
Branch lowering transforms the code into something like the following
to save a jump:
if (!(idy > 63 && idx > 0)) goto afterif;
<code in if>
afterif:
<code after if>

Then, !(idy > 63 && idx > 0) gets combined to (idy < 64 || idx < 1).

Then, your legalization transforms the branch condition into (!(idy <
64 || idx < 1) == 0).

Then, combine reorganizes this back into (idy > 63 && idx > 0).

It's hard to say where this is messing up.

-Eli