[LLVMdev] Vector code

Nicolas Capens nicolas at capens.net
Thu May 8 11:37:42 PDT 2008


Hi Dan,

My CPU supports up to SSSE3, and I assume LLVM uses that as a target by
default? I don't think that's the problem really, I'm just struggling to
find the right functions/classes to create and manipulate vectors...

Thank you,

-Nicolas


-----Original Message-----
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On
Behalf Of Dan Gohman
Sent: Thursday, 08 May, 2008 19:47
To: LLVM Developers Mailing List
Cc: llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] Vector code

On Thu, May 8, 2008 8:24 am, Nicolas Capens wrote:
> Hi all,
>
>
>
> I'm trying to use LLVM to generate SIMD code at runtime (in particular
> Intel
> SSE). But I'm having a bit of trouble understanding how to create even the
> simplest function; adding two vectors of four single-precision
> floating-point elements. I can get it to add the elements one at a time
> but
> not using one vector instruction.

What is your target set to? If LLVM thinks it's targeting a processor
that doesn't have SIMD instructions, it'll split vectors into
scalars like this.

Dan


_______________________________________________
LLVM Developers mailing list
LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev




More information about the llvm-dev mailing list