[LLVMdev] Instruction Scheduling

[Evan Cheng]

You must be using an older release of llvm. There are only three  
variants left: list-tdrr, list-burr, and list-td. These are all fairly  
basic: list scheduling for minimum latency (top down only, bottom up  
isn't implemented due to lack of time), list scheduling for minimum  
register pressure (both top down and bottom up, but in fact only the  
bu variant has been actively maintained).

x86 and arm defaults to list-burr, it does a reasonable job of  
minimize register pressure. Recently I haven't noticed many cases  
where it break down. ppc defaults to list-td, it uses a fairly simple  
hazard recognizer to form good dispatch groups.

There hasn't been any real scheduling study done using llvm as far as  
I am aware.

Evan

On Feb 29, 2008, at 8:31 PM, Fernando Magno Quintao Pereira wrote:

>
> Dear LLVM'ers,
>
>     I am browsing the instruction schedulers available in llc, and
> there are many:
>
>   -pre-RA-sched = {default, none, simple, simple-noitin, list-burr,
> list-tdrr, list-td}
>
>     I looked into the sources in lib/CodeGen/SelectionDAG, and I could
> find implementation of Sethi-Ullman numbering, list scheduling, etc.
>     Now, I wish I could find some comparison between the schedulers. I
> guess you guys probably have some tests somewhere. Basically, I wish I
> could know when it is better to use a scheduler, and when it is  
> better to
> use another. Even if someone could point me a paper/report discussing
> these issues, it would be great.
>
> best,
>
> Fernando
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