[LLVMdev] Backend for the ZPU - a stack based / zero operand CPU

[Chris Lattner]

On Fri, 20 Jun 2008, [ISO-8859-1] Øyvind Harboe wrote:
> The ZPU has two instructions that I'd also like to use. These instructions
> can push a value from deeper down on the stack and also pop a value
> from the stack and store them deeper down on the stack.

Sounds like the Intel X87 floating point stack, which we support.

> The ZPU needs relaxation. Immediate values and
> pc/sp relative references have variable lengths.
>
> Does llvm support ìnstruction relaxation?

Yes, many targets (e.g. arm, mips, ppc) have branch offset restrictions.

LLVM doesn't provide an assembler, you should use GAS.

-Chris

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