[LLVMdev] Generating movq2dq using IRBuilder

[Nicolas Capens]

Hi Stefanus,

I'm not if using MMX instructions when doing operations on 64-bit vectors is
so terrible? With x86-64 you have double the registers, but it comes at the
cost of longer instruction encodings. So there's probably no benefit using
SSE. Or am I missing something?

Cheers,

Nicolas


-----Original Message-----
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On
Behalf Of Stefanus Du Toit
Sent: Thursday, 31 July, 2008 23:51
To: LLVM Developers Mailing List
Subject: Re: [LLVMdev] Generating movq2dq using IRBuilder

On 31-Jul-08, at 2:38 PM, Dan Gohman wrote:
> On Jul 31, 2008, at 7:22 AM, Nicolas Capens wrote:
>> In the same breath I'd also like to kindly ask if someone could have
>> a look at the reverse operations, namely trunk from 128 to 64 bit
>> using movdq2q, and 128 to 32 and 64 to 32 using movd. This also
>> seems related to Bug 2585. Thanks again.
>
> The operations you're describing can be represented as insertelement
> and extractelement in LLVM IR.
>
> I don't know of anyone actively working on MMX tuning for LLVM, so
> if you'd like to see it improve, consider yourself encouraged to
> get involved directly :-).

I noticed that, when doing operations on 64-bit vectors, MMX  
instructions are often emitted even when SSE3 is available. Is this  
really the intent or is it just that SSE versions of certain patterns  
have not been added, and therefore it falls back to MMX versions? It's  
not really encouraged to use MMX (or x87 for that matter) on modern  
microarchitectures if you can get away with SSE.

--
Stefanus Du Toit <stefanus.dutoit at rapidmind.com>
   RapidMind Inc.
   phone: +1 519 885 5455 x116 -- fax: +1 519 885 1463




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