[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC

[Evan Cheng]

Looks good.

+    unsigned temp;
+    if (is64bit)
+      temp = RegInfo.createVirtualRegister(&PPC::GPRCRegClass);
+    else
+      temp = RegInfo.createVirtualRegister(&PPC::G8RCRegClass);

How about?

const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass :  
&PPC:G8RCRegClass;
unsigned TmpReg = RegInfo.createVirtualRegister(RC);

Evan

On Jul 9, 2008, at 9:16 AM, Gary Benson wrote:

> Ah, didn't see that, that's what comes of trying to do something at
> 5pm :)  I attached an updated patch which creates a virtual register
> instead of using R0.  How does this look?
>
> Cheers,
> Gary
>
> Dan Gohman wrote:
>> PPCTargetLowering::EmitInstrWithCustomInserter has a reference
>> to the current MachineFunction for other purposes. Can you use
>> MachineFunction::getRegInfo instead?
>>
>> Dan
>>
>> On Jul 8, 2008, at 1:56 PM, Gary Benson wrote:
>>> Would it be acceptable to change MachineInstr::getRegInfo
>>> from private to public so I can use it from
>>> PPCTargetLowering::EmitInstrWithCustomInserter?
>>>
>>> Cheers,
>>> Gary
>>>
>> _______________________________________________
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> http://gbenson.net/
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