[LLVMdev] llvm.atomic.barrier implementation

[Andrew Lenharth]

On 2/16/08, Duncan Sands <baldrick at free.fr> wrote:
> > GCC 4.2 compiles this to a no-op on x86:
> >
> > void foo() {
> >    __sync_synchronize();
> > }
> >
> > Are you seeing different behavior?  What am I missing here?
>
> Maybe the processor does a memory barrier when it executes
> a call instruction.

I had tried several variants of that with loads and stores around the
barrier.  GCC never generated a barrier, but it's not needed if you
are accessing cached memory (on x86, at least post-ppro, from what
I've read), only other stuff, so I am assuming gcc is making that
assumption about loads and stores.

Andrew