[LLVMdev] llvm.atomic.barrier implementation

[Chris Lattner]

On Feb 15, 2008, at 1:34 PM, Andrew Lenharth wrote:

> Attached is the target independent llvm.atomic.barrier support, as
> well as alpha and x86 (sse2) support.  This matches Chandler's
> definitions, and the LangRef patch will just restore that.  Non-sse2
> barrier will be needed, I think it is "lock; mov %esp, %esp", but I'm
> not sure.
>
> Any objections?  I'll take a hack at the front end support for
> __sync_synchronize after this goes in.

+    // MEMBARRIER - This corresponds to the atomic.barrier intrinsic.
+    // it takes 4 operands to specify the type of barrier:
+    // ll, ls, sl, ss
+    MEMBARRIER,

This should specify the input and output values, like EH_RETURN does.


+def : Pat<(membarrier (i8 1), (i8 0), (i8 0), (i8 0)), (LFENCE)>;
+def : Pat<(membarrier (i8 imm:$ll), (i8 imm:$ls), (i8 imm:$sl), (i8  
imm:$ss)),
+          (MFENCE)>;

Very nice.  I'll trust Chandler that these are right. :)

Looks great Andrew, please commit.  Thanks!

-Chris