[LLVMdev] llvm.atomic.barrier implementation

[Chandler Carruth]

This looks good to me after a cursory scan, and seems to match what I 
had worked up with some very welcome better form on the codegen/backend 
side. =D I'm glad you've had some time to start hacking on this, it may 
be several more weeks before I get any time to work on these and other 
LLVM projects.

Hopefully someone can chime in on appropriateness of the DAG and target 
implementations. One question: is "wmb" not actually useful on Alpha? My 
reading of docs had indicated it provided store-store memory barrier 
functionality, but I'm far from an expert on the architecture.

Again, glad to see some work on this, and glad you had some time!
-Chandler

Andrew Lenharth wrote:
> Attached is the target independent llvm.atomic.barrier support, as
>  well as alpha and x86 (sse2) support.  This matches Chandler's
>  definitions, and the LangRef patch will just restore that.  Non-sse2
>  barrier will be needed, I think it is "lock; mov %esp, %esp", but I'm
>  not sure.
> 
>  Any objections?  I'll take a hack at the front end support for
>  __sync_synchronize after this goes in.
> 
> 
>  Andrew
> 
> 
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