[LLVMdev] Goog test-cases for a new register allocator

[Roman Levenstein]

Hi everyone,

Thanks for all answers, proposals and test-cases I got for testing my
Extended Linear Scan register allocator.

Special thanks to Fernando and David for providing very concrete
test-cases and scripts!

-Roman

--- David Greene <dag at cray.com> schrieb:

> On Wednesday 02 April 2008 03:06, Roman Levenstein wrote:
> > Hi,
> >
> > As I mentioned some time ago on the mailing list, I'm working on
> the
> > implementation of the Sarkar's Extended Linear Scan algorithm for
> LLVM.
> 
> Cool!
> 
> > For testing and debugging of this algorithm, I need some good
> > test-cases that check different functionalities of the register
> > allocator, e.g.:
> >  - test-cases involving a lot of spilling
> >  - test-cases using pre-colored registers, e.g. like the EAX
> register
> > used by the division instruction on X86
> >  - test-cases making use of different (partially aliasing)
> > register-classes at the same-time
> >  - test-cases where the caller-save vs callee-save choices of
> registers
> > play a big role.
> >
> > I think these requirements are not specific for my allocator only,
> but
> > are important for checking any register allocator. May be someone
> > (Fernando? David? Evan?) who was working on register allocators has
> > found a good set of examples covering some of the topics? Or may be
> > someone knows good examples due to the fact that current register
> > allocators perform too bad on it? ;-)
> 
> I've found the NAS Parallel Benchmarks to be quite a good workout:
> 
> http://www.nas.nasa.gov/Resources/Software/npb.html
> 
> They are medium-sized benchmarks, so substantial without being
> totally
> overwhelming.  They manifest pretty much all of your points above. 
> The
> basic linear scan algorithm seems to do fairly well on them so it
> makes
> for a good comparison.
> 
> I use version 2.3, the serial flavor (yes, I understand the irony :)
> ).
> 
>                                                  -Dave
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