[LLVMdev] Alias analysis and instruction level parallelism

[Pertti Kellomäki]

Duncan Sands wrote:
>> My initial reaction is that if one were to decorate MachineInstr's
>> with the LLVM level pointer values that they use for reading
>> and writing memory,
> 
> this is already the case: SrcValue and SVOffset.

Ah, that's right. I went back and read the discussion from
January, and Florian Brandner explains there that the real
culprit is the lowering of GEP in the codegen prepare pass.

Florian, if you have worked more on this, we would be very interested
in your work. Serialization caused by memory references is a big
obstacle for us at the moment.
-- 
Pertti