[LLVMdev] New to LLVM, Help needed

[Chris Lattner]

On Tue, 11 Sep 2007 Alireza.Moshtaghi at microchip.com wrote:
> More information on this... still not working
> When I build the project for Debug and run the program, the following
> message is printed before assert.
>
> NODE: 0x937bac8:  i64 = GlobalAddress <i32* @var> 0

This implies that your target uses 64-bit pointers, but that it doesn't 
have a 64-bit register file, is this right?

If you aren't using 64-bit pointers, you should investigate where this 
node came from.

> I guess it is expecting that GlobalAddress be legalized before reaching
> ExpandOp(). I haven't implemented anything for ISD::GlobalAddress, and
> that may explain it, however, I couldn't find much about it in the
> PowerPC implementation either. The only thing is in the ctor of
> PPCTargetLowering there is setOperationAction(ISD::GlobalAddress,
> MVT::i32, Custom);  and
>
> setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
> so I also added these two function calls to my ctor of
> PICxxTargetLowering. Nothing changed. I also tried "Expand" and "Legal"
> instead of "Custom", still no progress. I'm sure I am missing some thing
> here.

You may be running into problems if the pointer type in the code generator 
isn't natively supported by your register file.  We haven't hit a target 
like this yet, so you will likely have to expand LegalizeDAG to handle 
these cases.

-Chris

>
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
> On Behalf Of Evan Cheng
> Sent: Monday, September 10, 2007 10:29 AM
> To: LLVM Developers Mailing List
> Subject: Re: [LLVMdev] New to LLVM, Help needed
>
>
>
> Please do a debug build and run it under gdb. Let us know where it is
> asserting and what it is asserting on so we can help you.
>
>
>
> Evan
>
>
>
> On Sep 7, 2007, at 4:50 PM, Alireza.Moshtaghi at microchip.com wrote:
>
>
>
>
>
> Hi,
>
> I have started to write an llvm backend for one of our microcontrollers
> (PICxx). I started studying the framework of PowerPc backend of llvm and
> decided to start by following that framework. Now I have most of the
> classes and Tblgen files written for a very basic hypothetical
> microcontroller with very few instructions.
>
> The project builds and the llc recognizes the new processor, however,
> when it reaches the point where it wants to lower llvm IR to PICxx DAG,
> it asserts in LegalizeDAG.cpp in ExpandOp() function after it hits the
> default case of switch(Node->getOpcode())
>
> Can someone please help me understand how am I ending up in the default
> case?
>
>
>
> Thanks,
>
> A.
>
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>
>

-Chris

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