[LLVMdev] New to LLVM, Help needed

Bill Wendling isanbard at gmail.com
Sat Sep 8 02:54:05 PDT 2007


On Sep 7, 2007, at 4:50 PM, <Alireza.Moshtaghi at microchip.com>  
<Alireza.Moshtaghi at microchip.com> wrote:

> I have started to write an llvm backend for one of our  
> microcontrollers (PICxx). I started studying the framework of  
> PowerPc backend of llvm and decided to start by following that  
> framework. Now I have most of the classes and Tblgen files written  
> for a very basic hypothetical microcontroller with very few  
> instructions.

Cool!
> The project builds and the llc recognizes the new processor,  
> however, when it reaches the point where it wants to lower llvm IR  
> to PICxx DAG, it asserts in LegalizeDAG.cpp in ExpandOp() function  
> after it hits the default case of switch(Node->getOpcode())
>
> Can someone please help me understand how am I ending up in the  
> default case?

It's hard to say. You'd have to look at what the Node->getOpcode()  
is. It should be one of the ones that's being handled. It's not, so  
you need to figure out why it isn't, where it's coming from, and how  
to get it to be one of the opcodes handled. Check your  
PICxxISelLowering.cpp (?) file and see what it's doing with that  
opcode. Are you really going to "expand" it, or should it do  
something else (legal, promote)?

These are a few tips. Others will jump in with better ideas, I'm sure.

-bw

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