[LLVMdev] Newbie: Target Lowering info.

[Sanjiv Gupta]

thanks Evan,
I have just started writing td files.

Any ideas how do I describe instructions for an accumulator based machine.
The other pecularity is that we do not want to have any software stack.
So the instructions like load and store have no meanings.

In that case,   how do I lower instructions that operate on stack frame?

TIA,
Sanjiv

On 11/26/07, Evan Cheng <evan.cheng at apple.com> wrote:
>
>
> On Nov 24, 2007, at 7:28 PM, Sanjiv Gupta wrote:
>
> > Could anybody guide me what information do I need to know about my
> > target in order to provide the target lowering info to the llvm DAG
> > generator? We do not have any fixed registers for argument passing.
> > Everything including the formal and actual arguments will take part in
> > a global interprocedural regalloc.
>
> You don't have to formally specify calling convention. For example,
> ARM backend does not have a ARMCallingConv.td file, all the argument
> passing info are implicitly defined in the lowering code.
>
> To start, you should specify legal register files, legal operations,
> etc. See XXXISelLowering.cpp for examples.
>
> Evan
>
> >
> >
> > Any pointers to learn about this will be a great help.
> > Sanjiv
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