[LLVMdev] Will any pass change simple return branch into select/return pair?

[Chris Lattner]

On Fri, 23 Nov 2007, Zhou Sheng wrote:
> Can any llvm pass change simple return branch into select/return pair?
> For example:

Yes, simplifycfg does this.  However, it doesn't do it for your example, 
because the add is in one of the blocks.  Simplifycfg won't change the 
code to unconditionally execute it.

This sort of thing is traditionally handled in the code generator.  For 
example, the ARM backend uses a predication pass to execute instrutions 
conditionally.

-Chris

> define i10 @mod_N(i10 zeroext  %a) zeroext  {
> entry:
>    %tmp2 = icmp ugt i10 %a, -400       ; <i1> [#uses=1]
>    br i1 %tmp2, label %cond_true, label %return
>
> cond_true:      ; preds = %entry
>    %tmp5 = add i10 %a, 400     ; <i10> [#uses=1]
>    ret i10 %tmp5
>
> return:     ; preds = %entry
>    ret i10 %a
> }
>
> Changed into:
>
> define i10 @mod_N(i10 zeroext  %a) zeroext  {
> entry:
>    %tmp2 = icmp ugt i10 %a, -400       ; <i1> [#uses=1]
>    %tmp5 = add i10 %a, 400     ; <i10> [#uses=1]
>    %retval = select i1 %tmp2, i10 %tmp5, i10 %a        ; <i10> [#uses=1]
>    ret i10 %retval
> }
>
> Thanks in advance.
>
> Sheng.
>

-Chris

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