[LLVMdev] PR400 - alignment for LD/ST

Reid Spencer rspencer at reidspencer.com
Sat Mar 31 14:16:26 PDT 2007


Hi Christopher,

On Sat, 2007-03-31 at 15:43 -0500, Christopher Lamb wrote:

> 
> 
> For the assembly format I assume that it would be a simple optional
> comma delimited alignment parameter at the end of the instruction,
> such as:
> 
> 
> %tmp5 = load i32* %tmp4, align 4
> store i32 %val, i32* %tmp3, align 4

Yes, correct.

> 
> 
> Has the format for the extension of the load/store bytecode been
> determined? 

Nothing decided yet.

> This would need to be applied to both normal and volatile load/store
> instructions, and I see three options.
> 
> 
> 1. Add the ability to encode optional arguments on any load/store and
> volatile variants. This is general, but I can see why it could be bad
> given how frequent load/stores tend to be. Perhaps this is why pseudo
> ops were chosen for the volatile versions?
> 
> 
> 2. Create pseudo opcodes for the permutations of volatility and
> alignment. This will consume 4 more opcodes, but it would not bloat
> the bytecode when natural alignment is used.
> 
> 
> 3. Create pseudo ops for 'attributed' load/store instructions. These
> instructions contain a set of optional attributes encoded in some way.
> The current volatile load/store instructions could be subsumed by
> these instructions.
> 
> 
> I'm leaning away from 1, but unsure whether 2 or 3 is better.

3 is best. opcodes are at a premium (six bits) and consuming 8 or more
of them for load/store won't work (there isn't enough left). #2 could
work but it penalizes the (hopefully more common) natural alignment
case. So, I would just conver the Store+Volatile and Load+Volatile
opcodes into Store+Attributes and Load+Attributes. Then the volatile and
alignment attributes can be added for those (relatively uncommon) cases.

Thanks for looking into this Christopher!

Reid.

> 
> 
> Thanks
> --
> Christopher Lamb
> 
> 
> 
> 
> 
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