[LLVMdev] Back end loop invariant opt

[Andrew Lenharth]

On 3/25/07, Christopher Lamb <christopher.lamb at gmail.com> wrote:
> Isn't it possible to tell that certain DAG nodes are loop invariant prior to
> instruction selection, such as a constant or global address node?

Only in part.  Selection of some nodes generates duplicate code in
some backends and not others.  A global that requires 2 instructions
to load, as on alpha (where one of those instructions may sometimes be
redundant with other loads of globals, but not always), may benfit
from hoisting whereas on some architectures hoisting the load out may
increase register pressure with little benefit (or the addressing is
trivially folded into the load, etc).  The current thinking is a LICM
and CSE type pass needs to operate on machine code (in a target
independent way) so that the particularities of each architecture are
exposed (by virtue of having the machine code selected).  There isn't
also a way to remove duplicate instructions that are introduced as an
artifact of the architecture in the DAG stage.  DAG nodes are not a
1:1 mapping onto selected instructions.

Andrew