[LLVMdev] TargetRegisterClass for Physical Register
Chris Lattner
sabre at nondot.org
Mon Jun 18 22:35:57 PDT 2007
On Mon, 18 Jun 2007, David Greene wrote:
> So there are multiple ValueTypes here (the scalar registers each only have
> one corresponding to the bit size of the register). But still, if I have
> physical register MM2, that completely determines its register class.
Right.
> Is there some other architecture where the physical register name/number
> does not completely determine its register class?
Yes, for example, X86. On X86, we have XMM registers that can hold one of
three things: an f32 value, a f64 value, or a vector value. These are
represented by different register classes containing the same registers.
Likewise, PPC has f32/f64 represented as two different register classes,
but has all the F registers in both.
Ugly yes, but this does model the hardware more closely than artificially
duplicating each register for each different value type it can hold...
-Chris
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