[LLVMdev] PR1350 (Vreg subregs) questions

[Chris Lattner]

On Tue, 12 Jun 2007, Christopher Lamb wrote:
>> > > >   When should subregs be flattened to actual registers: AsmPrinter?
>> > > >   Somewhere in LiveIntervals, during RegAlloc?
>> 
>>  This should definitely be done during regalloc.
>
> It seems that LiveIntervals will need to be taught about the new form of 
> virtual registers. Hrm. I'm going to try to break this work up as much as 
> possible.

Splitting up the work is good :)

> Also, do you see any problems with using the following class for vregs? It 
> makes it possible to not have to go through and update every call site for a 
> large number of functions.
>
> class vreg : public std::pair<unsigned,unsigned> {
> public:
>  vreg(unsigned f) : std::pair<unsigned,unsigned>(f, 0) {}
> };
>
> If this definition is OK, where should it live? It's needed all over the 
> place...

Where would you use this?  It seems that the only place that would need it 
is in the DAG schedulers, which turn the dags into a machineinstr stream. 
If so, putting it into the scheduler baseclass would make sense.

If you do something like this, I'd suggest a trivial value class that 
doesn't derive from std::pair.

-Chris

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