[LLVMdev] PassManager Error

[David A. Greene]

On Wednesday 25 July 2007 17:29, Devang Patel wrote:

> In simple words, pass manager is not able to schedule passes in
> requested order.  Pass manager is not able to find required pass at the same 
> level (module, function, loop etc..) or higher level compared current pass.

Ok, that gives me some ideas. I didn't understand what "level" means.

> What is Pass and RequiredPass when this assertion hits ?

I haven't had a chance to explore too deeply yet (the stack trace doesn't give 
any useful information) but I suspect Pass is the register allocator and 
RequiredPass is the coalescer.  I say that because the coalescer is an 
ImmutablePass (since it shouldn't be run by PassManager) and ImmutablePass 
derives from ModulePass, which would trigger the error.  The register 
allocator does a getAnalysis<RegisterCoalescer> to talk to the coalescer.

So now the question is, what kind of Pass should the coalescer be?  It should
not be run by PassManager but PassManager still needs to know about its
analysis requirements.  Do we need a new kind of Pass, like 
ImmutableFunctionPass, or in this specific case, ImmutableMachineFunctionPass?

I hate this kind of multiple-cross-product-derivation-categorization.  :-/

How does this work for AliasAnalysis, which is also an ImmutablePass (or, at 
least some of them are)?  How do FunctionPasses query the analysis?

                                             -Dave