[LLVMdev] Proposal for atomic and synchronization instructions

[Andrew Lenharth]

On 7/9/07, Andrew Lenharth <andrewl at lenharth.org> wrote:
> Poor alpha, no code examples or entries in your tables.

But that said, it uses a load-locked, store-conditional and has
various memory barriers which are sufficient to implement all your
proposal.

Andrew

> On 7/9/07, Chandler Carruth <chandlerc at gmail.com> wrote:
> > Hello,
> >
> > After a fair amount of research and work, I have put together a
> > concrete proposal for LLVM representations of atomic operations and
> > synchronization constructs. These aim to provide the minimal
> > functionality in the IR for representing the hardware constructs that
> > threading libraries and parallel programming rely on.
> >
> > http://chandlerc.net/llvm_atomics.html
> >
> > While I am no expert on the various architectures, I've done my best
> > at providing base-line implementations for each instruction. I am sure
> > these will need tweaking and fixing, but should provide a very good
> > starting point for the targets.
> >
> > Comments are more than welcome, especially suggestions for
> > improvement. I hope this provides a sound background and a good
> > starting place for bringing these features to LLVM. Many thanks also
> > go to Reid who has helped tremendously with putting this together, and
> > several of the people at Aerospace who helped in the research phase.
> >
> > -Chandler Carruth
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>