[LLVMdev] Custom GEP lowering

[Dan Gohman]

On Mon, Aug 27, 2007 at 07:26:55PM -0700, Scott Michel wrote:
> It looks like I need to be able to intercept GEP lowering (in  
> SelectionDAGLowering::visitGetElementPtr) and insert something else  
> other than the shifts and adds. The basic problem is that CellSPU  
> loads and stores on 16-byte boundaries. Consequently, the SPU backend  
> has to do the load or store differently than most normal  
> architectures that have byte-addressable operations.

In TOT, load and store instructions have an alignment attribute which is
useful for addressing similar needs on other architectures. For example,
this attribute is used on x86, which also has a bunch of instructions
which require 16-byte alignment. x86 uses it quite late, after legalize,
and I don't know if that's appropriate for the CellSPU target, but
wherever you're doing the lowering, could you use the load and store
alignment attribute?

The alignment attribute can be set by LLVM IR producers (front-ends),
however instcombine also automatically sets alignments on load an store
instructions by looking through GEPs and casts and examining underlying
storage. There's room for improvement, but it gets common cases.

Dan

-- 
Dan Gohman, Cray Inc.