[LLVMdev] [patch] Pluggable Coalescers

[David A. Greene]

Here's a proposed patch for reworking register coalescing to allow pluggable
coalescers.  I think I've got the interfaces where I want them and am 
reasonably sure I've squashed most of the bugs.  I'm still doing some testing
and want to get through a whole regimen before committing.

As a reminder, this patch has several goals:

- Allow user-specified register coalescers, similar to how register allocators 
  and alias analyses work.

- Support coalescers that are not first-class passes.  The interfaces need to
  accommodate coalescers like the current implementation which are independent
  passes and coalescers which run in tandem with another pass (usually 
  register allocation).

- Set up the foundation for further patches to break out common coalescing
  work for reuse by various coalescers.

This patch realizes the first goal by defining a new RegisterCoalescer 
interface and analysis group similar to the way AliasAnalysis is used.  This
interface is used by coalescers that work in tandem with other passes.
It is mostly ignored by stand-alone coalescers except for analysis group
implementation selection by the pass managers (all coalescers must have
a common interface to be part of the analysis group).

The patch realizes the second goal through this common interface, which has
methods for invoking the coalescer, possibly repeatedly.  There is an abstract
InterferenceData interface for the register allocator to provide information 
to the coalescer in an opaque manner.

I've implemented these interfaces in a compiler with the current linear scan 
allocator as well as a graph coloring allocator, with the current coalescer as
well as one based on George and Appel's Iterated Coalescing.  It's proven to
be sufficiently flexible for these cases.

Take a look and send feedback.  Thanks for helping to make this better!

                                                 -Dave
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