[LLVMdev] Instruction pattern type inference problem

[Chris Lattner]

On Mon, 23 Apr 2007, Christopher Lamb wrote:
>>  Definitely a bug.  I don't think any existing targets support v2f32 which
>>  is probably why it wasn't noticed.
>
> Fix is in.

Thanks!

>>  Do you have a specific example in mind?
>
> A strategy that we have had luck with in the past is the concept of a 
> "vector boolean" type, which is the result of a comparison between two 
> vectors. It's then necessary to perform a reduction (and, or) on the 
> elements in order to produce a scalar boolean value that's suitable for 
> a branch. This also allows stuff like letting 'select' accept a vector 
> boolean predicate and vector values to perform a vector select.
>
> In these cases you'd want to enforce the kinds of operand type 
> constraints as mentioned above to ensure that the types are all 
> acceptable.

Sure, this makes sense.  If you wanted to add comparisons and select 
operations to the LLVM level, I'd suggest exactly what you suggest:

* vector compares which return a vector of bools
* vector selects which take a vector of bools and two other vectors
* an any/all predicate that performs an and/or reduction.

I believe that the SSE and Altivec instruction set could implement the 
important cases of these (e.g. compare+any), but right now we just use 
LLVM intrinsics for all of the SSE/Altivec compare-related instructions. 
When we get a vectorizor, we will probably want the more generic mechanism 
though.

-Chris

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