[LLVMdev] Typo in Makefile.rules and suugestion for Makefile.config.in
Vladimir Merzliakov
wanderer at rsu.ru
Tue Mar 1 08:21:55 PST 2005
1) I find typo in Makefile.rules in printvars rule:
- $(Echo) "Preconditions: " '$(Preconditions)'
+ $(Echo) "PreConditions: " '$(PreConditions)'
2) In Makefile.config.in PROJ_SRC_DIR define for LLVM build mode as
PROJ_SRC_DIR := $(subst //,/,$(LLVM_SRC_ROOT)/$(patsubst
$(PROJ_OBJ_ROOT)%,%,$(PROJ_OBJ_DIR)))
and for other project build mode as
PROJ_SRC_DIR := $(subst //,/,$(PROJ_SRC_ROOT)/$(patsubst
$(PROJ_OBJ_ROOT)%,%,$(PROJ_OBJ_DIR)))
This two definition is equal (in LLVM build mode $(LLVM_SRC_ROOT) ==
$(PROJ_SRC_ROOT) )
and have common problem.
If generated Makefile.config used in Makefile not in root of project object
tree $(PROJ_SRC_DIR) != $(PROJ_SRC_ROOT)
it set PROJ_SRC_DIR to correct not slash terminated path.
But if it used in Makefile in root of project object tree
$(PROJ_SRC_DIR)==$(PROJ_SRC_ROOT)
it set PROJ_SRC_DIR to "$(PROJ_SRC_ROOT)/" instead "$(PROJ_SRC_ROOT)"
I suggest replace this lines by code:
ifeq ($(PROJ_OBJ_DIR),$(PROJ_OBJ_ROOT))
PROJ_SRC_DIR := $(PROJ_SRC_ROOT)
else
PROJ_SRC_DIR := $(subst //,/,$(PROJ_SRC_ROOT)/$(patsubst
$(PROJ_OBJ_ROOT)%,%,$(PROJ_OBJ_DIR)))
endif
Vladimir
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