[LLVMdev] Making a pass available to llc?

[Michael McCracken]

On 7/26/05, Reid Spencer <reid at x10sys.com> wrote:
> On Tue, 2005-07-26 at 17:25 -0700, Michael McCracken wrote:
> 
> > Since I'm modifying llc, I have a couple small questions about that code:
> >
> > opt and analyze (and a couple of other places) add a verifier pass,
> > but llc doesn't.
> > This would seem to make sense for llc as well - should I add it, with
> > the corresponding
> > hidden -no-verify option?
> 
> I can't see any harm in that. However, please make sure that it really
> isn't being run. The verifier can be hidden by various levels of
> abstraction.

Assuming that I get everything with -debug-pass=Structure, then it isn't:

% llc -march=x86 -stats -f tests/IS/npbis.bc -debug-pass=Structure
Pass Arguments:  -lowergc -lowerinvoke -lowerswitch -unreachableblockelim
Target Data Layout
Module Pass Manager
  Function Pass Manager
    Lower GC intrinsics, for GCless code generators
--  Lower GC intrinsics, for GCless code generators
    Lower invoke and unwind, for unwindless code generators
--  Lower invoke and unwind, for unwindless code generators
    Lower SwitchInst's to branches
--  Lower SwitchInst's to branches
    Remove unreachable blocks from the CFG
--  Remove unreachable blocks from the CFG
    X86 Pattern Instruction Selection
--  X86 Pattern Instruction Selection
    Live Variable Analysis
    Eliminate PHI nodes for register allocation
    Two-Address instruction pass
    Immediate Dominators Construction
    Dominator Set Construction
--  Immediate Dominators Construction
    Natural Loop Construction
--  Dominator Set Construction
    Live Interval Analysis
--  Natural Loop Construction
--  Live Variable Analysis
--  Eliminate PHI nodes for register allocation
--  Two-Address instruction pass
    Linear Scan Register Allocator
--  Live Interval Analysis
--  Linear Scan Register Allocator
    Live Variable Analysis
    X86 FP Stackifier
--  Live Variable Analysis
--  X86 FP Stackifier
    Prolog/Epilog Insertion & Frame Finalization
--  Prolog/Epilog Insertion & Frame Finalization
    X86 Peephole Optimizer
--  X86 Peephole Optimizer
    X86 AT&T-Style Assembly Printer
--  X86 AT&T-Style Assembly Printer
    Machine Code Deleter
--  Machine Code Deleter


I'll add it. I managed to uncover a bug in my own code with my new
version of llc, though, so I might not have a patch to send tonight,
but I will soon.

Thanks,
-mike

-- 
Michael McCracken
UCSD CSE PhD Candidate
research: http://www.cse.ucsd.edu/~mmccrack/
misc: http://michael-mccracken.net/blog/