[LLVMdev] Define an instruction with many operands
Tzu-Chien Chiu
tzuchien.chiu at gmail.com
Wed Aug 10 23:04:46 PDT 2005
If I have an instruction which has many register and immediate
operands, what's the difference between these two implementations to
define the instruction in TableGen *.td file?
(1) Similar to what has been done to complex X86 addressing mode. A
single 32-bit immediate (i32) encodes how to add many MachineOperands
to the MachineInstr object (With the help of functions in
X86InstrBuilder.h).
// similar to X86MemOperand in X86InstrInfo.td !!
class ManyOperands : Operand<i32> {
let NumMIOperands = 100; // a very large number
let PrintMethod = "printManyOperands";
}
def MO : ManyOperands;
def FOOBAR: Instruction<(ops MO:$operands), "foobar {$operands}">;
(2) 'Collapse' all operands in .td file. Contrary to method (1), each
operand is explicitly specified.
def FOOBAR: Instruction<(ops R32:$src0, R16:$src1, ... ), "foobar
$src0, $src1, ...">;
The operand list could be very long.
--
Tzu-Chien Chiu,
3D Graphics Hardware Architect
<URL:http://www.csie.nctu.edu.tw/~jwchiu>
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