[LLVMdev] BranchInst problem

[Chris Lattner]

On Tue, 8 Jun 2004, Vladimir Prus wrote:

> While adding support for branch instructions in my backend, I run into a
> trouble. The code to handle branches looks like:
> The machine code after instruction selection is:
>
>    entry (0x8681458):
>         %reg1024 = load <fi#-1>
>         %reg1025 = load <fi#-2>
>         setcc %reg1024, %reg1025
>         goto %disp(label then)
>         goto %disp(label else)

I assume that the two unconditional gotos are just test code, right?  If
not, the second one is dead.

> which looks ok, but after register allocation and prolog/epilogue insertion, I
> get this:
>
>    entry (0x8681458):
>         .....
>         setcc %gr0, %gr1
>         goto %disp(label then)
>         goto %disp(label else)
>         %ar6 = + %ar6, 1
>         store %ar6, %gr0
>         %ar6 = - %ar6, 1
>         %ar6 = + %ar6, 2
>         store %ar6, %gr1
>         %ar6 = - %ar6, 2
>
> The code after "goto" is disturbing. It looks like spill code, but it's not
> going to be ever executed. Any ideas why it's generated? Is there any
> additional information I should provide?

Yup, just add the "isTerminator" bit on your gotos in your tablegen
description for the instruction.  This informs the code generator that any
spill code has to go above the instructions.

-Chris

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