[LLVMdev] LiveIntervals::handlePhysicalRegisterDef, unreachable MBBs

[Vladimir Prus]

Alkis Evlogimenos wrote:

> > Maybe, something like:
> >
> > // Determine the end of the live interval for this register
> > // For physical register, all internvals are within basic blocks so
> > // we look for the instruction in this basic block which last uses it.
> >
> > The first loop might have a comment like:
> >
> > // If the register is dead at instruction which sets it (i.e. not used
> > later) // the live interval ends at the next instruction
>
> Actually it ends at the same instruction. Each instruction has 4 slots.
> So instruction 0 spans interval indexes 0-3, instruction 1 4-7 and so
> on. In the case above the interval added is:
>
> [defSlot(instr), defSlot(instr)+1)

Ok, I did not know about "slots".

> You may notice that this interval is "empty" in the interval indexes
> discrete world (i.e. [13,14)). Indeed it is, and its only purpose is to
> naturally express this clobbering of physical registers to the register
> allocator. For example given [13,14) for some physical register A and a
> live interval [0,27) for some virtual register Z, we cannot allocate A
> to Z because of the overlap!

Yes, I understand that.

> I added comments to the handlePhysicalRegisterDef. Let me know if it
> makes more sense now.

Yes, definitely. Thanks!

- Volodya